Rarely has this been more evident than with the back-to-back launches of its latest 3rd-gen Epyc server CPUs and its Ryzen Pro 5000 series mobile processors for…
Rarely has this been more evident than with the back-to-back launches of its latest 3rd-gen Epyc server CPUs and its Ryzen Pro 5000 series mobile processors for enterprise notebooks. Both the Epyc 7003 family of chips (codenamed “Milan”) and Ryzen Pro 5000 mobile processors (like consumer versions, codenamed “Cezanne”) are based on the company’s Zen 3 core architecture—a 7nm design that continues the impressive performance path that the company began with the original Zen cores that debuted in 2017. While each of the new chips is optimized for their very different needs and applications, they do share a number of enhancements that are at the heart of Zen 3 cores, including larger, unified caches for faster processing with larger data sets—as many AI-focused workloads on both servers and PCs require. Cezanne Detailed Die Shot Zen 3 lets all eight of the available CPUs in each core complex access the full amount of L2 cache (32 MB for Epyc and 16 MB for Ryzen Pro, both of which are twice the size of their predecessors). This is a significant enhancement over Zen 2 designs, which had groups of four cores that were each able to access 16 MB or 8 MB, respectively. This new architecture makes it easier for multi-threaded applications capable of simultaneously using all cores to fully leverage the cache, resulting in significantly improved performance for these types of programs. Again, that’s something that’s very useful in both servers and notebooks, but for entirely different types of applications. In addition to performance enhancements—including a 19% improvement in the critical Instructions Per Clock (IPC) metric on the Zen 3 cores found in both chips—AMD added several hardware-based security improvements, which are becoming increasingly important for businesses of all sizes.
