Intel has offered deep dives into the architectures behind many of its upcoming consumer and datacentre products including 12th Gen Core Alder Lake CPUs, Xe-HPG Alchemist Arc GPUs, Ponte Vecchio and Sapphire Rapids
Intel held a virtual Architecture Day presentation, disclosing details of the engineering behind several upcoming products in the consumer and data centre spaces. While exact specifications of CPUs and GPUs will have to wait till they are actually launched, we now have a better idea of the building blocks that Intel is using to put them together. Intel SVP and GM of the Accelerated Computing Systems and Graphics group, Raja Koduri, led the presentation during when multiple senior Intel engineers appeared. The 12 th Gen Core CPU lineup, codenamed ‘ Alder Lake ‘, is expected to launch within the next few months, starting with desktop models. These will be the first mainstream Intel CPUs to feature a mix of high-performance and low-power cores – which is common across mobile SoCs today. This follows the experimental ‘ Lakefield ‘ CPU which has had only a limited release so far. Alder Lake will use a more modular approach than before, with different combinations of logic blocks for different product segments. Intel will use the terms Performance core and Efficient core, often shortened to P core and E core. For Alder Lake, the E cores are based on the ‘Gracemont’ architecture while the P cores use the ‘Golden Cove’ design. For Gracemont, Intel targeted physical silicon size and throughput efficiency, to target multi-threaded performance across a large number of individual cores. These cores run at low voltage and will be used primarily by simpler processes. The Golden Cove-based P cores are designed for speed and low latency. Intel calls this the highest-performing core it has ever built. New with this generation is support for Advanced Matrix Extensions for accelerating deep learning training and inference. Three different Alder Lake dies will serve different product segments Combined, this generation of P and E cores in the Alder Lake architecture will be highly scalable, from 9W to 125W, which covers most of today’s mobile and desktop categories. It will be manufactured using the newly announced Intel 7 process, which is a rebranding of the 10nm ‘Enhanced SuperFIN’ process. Different implementations will integrate different combinations of DDR5, PCIe Gen5, Thunderbolt 4, and Wi-Fi 6E.
