According to members of the Anandtech forums, AMD has significantly reduced cache size to accommodate large AI chips on upcoming Strix Point hardware. If the reports prove.
Why it matters: As chipmakers embark on a widespread transition to locally processed generative AI, certain users are still questioning the need of this technology. NPUs have emerged as a new buzzword as hardware vendors aim to introduce the concept of the „AI PC,“ yet their arrival prompts speculation about whether the valuable die space they occupy could have been allocated to more beneficial purposes.
According to members of the Anandtech forums, AMD has significantly reduced cache size to accommodate large AI chips on upcoming Strix Point hardware. If the reports prove accurate, it would suggest that AMD and other processor vendors are placing considerable bets on a trend that is still unproven.
User „uzzi38“ claimed that AMD initially intended to equip Strix Point APUs with system-level cache, which would have substantially improved CPU and integrated graphics performance.
