PCIe Gen 6.2 and CXL 3.1 in a single chip
Apollo 2 switch supports Gen 6.2 and CXL 3.1 inside a single hybrid chip
XConn wants to redefine bandwidth limits, but real-world results remain completely untested
Intel and XConn are collaborating to test full-stack compatibility in PCIe-based ecosystems
XConn Technologies is preparing to demonstrate what it describes as a fully integrated, end-to-end PCIe Gen 6.2 and CXL 3.1 solution at the upcoming Future of Memory and Storage (FMS25) event.
The company is positioning the launch as a critical step toward meeting the performance needs of AI and data center workloads.
However, as with any early-stage technology demo, real-world scalability and reliability are still open questions.Hybrid switch with theoretical flexibility
The company’s Apollo 2 switch will be the core of this unveiling – marketed as the industry’s first hybrid switch to support both PCIe Gen 6.2 and CXL 3.1 within a single chip, it is said to simplify interconnect designs and enhance scalability.
„XConn is excited to bring to market PCIe Gen 6.
