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Over the holidays I noticed that ARM released information on a new core design aimed at autonomous driving systems. The Cortex-A65AE is part of the company’s Automotive Enhanced lineup and follows on the Cortex-A76AE) with its split-lock and other features that are part of ARM’s Safety Ready. Aimed at processors that will be used in self driving cars, advanced driver assistance systems (ADAS), aviation, and industrial automation, the Cortex-A65AE design integrates several safety and redundancy features that meet ASIL D specifications which is a hazard and risk assessment test for an ISO standard (26262) focused on road vehicle safety. Processors will be able to have up to eight cores and will support SMT with each physical core able to run two threads (at different exception levels and/or under different OSes). The cores can be run independently for performance or in lock step for redundancy and integrity checking comparing each other’s calculation results (Split-Lock and Dual Core Lock Step respectively). Using the simultaneous multithreading, two threads on a physical core and operate in lock step mode with two other threads on a different physical shadow core according to.
