Chiplets, as the name suggests, are smaller less complex chips, that meant to work together into more powerful processors. They’re arguably the inevitable future for all high-performance…
Chiplets, as the name suggests, are smaller less complex chips, that meant to work together into more powerful processors. They’re arguably the inevitable future for all high-performance components, and, in some cases, the successful present; AMD’s use of chiplet CPU designs has been brilliant. In the new patent dated December 31, AMD outlines a chiplet design fashioned to mimic a monolithic design as closely as possible. Their hypothetical model uses two chiplets connected by a high-speed inactive interposer called a crosslink. A crosslink connection sits between the L2 cache and L3 cache on the memory hierarchy. Everything beneath it, such as the cores and L1 cache and L2 cache, are aware of their separation from the other chiplet. Everything above, including the L3 cache and GDDR memory, are shared between the chiplets. This design is beneficial because it is conventional. AMD claims that compute units can access low-level cache on other chiplets almost as fast as they can access local low-level cache. Should that prove true, software won’t need updating. The same cannot be said of Intel and Nvidia’s designs. Intel intends on using two new technologies, EMIB (embedded multi-die interconnect bridge) and Foveros.
