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IBM's breakthrough process paves the way for densely-packed 5nm chips

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IBM doesn' t manufacture chips anymore, but it’ s still very much involved in testing and developing new manufacturing techniques that will pave the way for next generation of microprocessors. Today, an IBM-led group of researchers have detailed a breakthrough in transistor…
IBM doesn’t manufacture chips anymore, but it’s still very much involved in testing and developing new manufacturing techniques that will pave the way for next generation of microprocessors. Today, an IBM-led group of researchers have detailed a breakthrough in transistor design, one that will enable processors to pack 30 billion 5nm switches onto a chip the size of a fingernail.
The 5nm chip research is coming from IBM’s Research Alliance with partners GlobalFoundries and Samsung, which also developed a 7nm test chip two years ago .
The innovation at the core of the new chip is a brand-new architecture, eschewing the current FinFET (fin field effect) design in favor of stacks of silicon nanosheets.
As Mukesh Khare, vice president of semiconductor technology research at IBM Research explains, the industry is racing to move beyond FinFET design because it doesn’t scale anymore. The technology began appearing in 22nm and 14nm chips and is expected to continue to be used with 7nm chips.
The more transistors you can squeeze into a chip, the more speed and power efficiency gains you get at a lower cost. But as chip designers cram more transistors closer together using FinFET design, chips are confronting issues with transistor leakage. « Geometrically, FinFETs cannot scale anymore,  » Khare said.
The new design developed by IBM switches from a vertical fin structure that sends electrons through three gates, to layering silicon nanosheets horizontally in a way that effectively results in a fourth gate, which ultimately results in the ability to squeeze more compute power in the same area. With the increased transistor density, IBM said the 5nm chip achieves a 40% performance boost, or 75% power efficiency with the same performance, over current-generation 10nm chips.
“Moore’s Law is constantly being challenged because it’s not easy, ” Khare said. “It constantly requires fundamental breakthroughs. The new transistors will enable [the chip industry] to continue scaling and generate the economic value Moore’s Law has predicted.”
Processors built off of this new structure are expected to hit the market in 2019 or 2020 at the earliest.

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